JEE Main 2025 Apr 7 Shift 2, Physics Q11: Logic Gates

JEE Main2025Apr 7, Shift 2Physics

Consider the following logic circuit.

The output is Y = 0 when :

A
A = 1 and B = 1
B
A = 0 and B = 1
C
A = 1 and B = 0
D
A = 0 and B = 0

Solution

Reading the circuit as drawn, the intermediate outputs are $Y_{1} = A \cdot B$ (AND gate) and $Y_{2} = \overset{ˉ}{A} + B$ (OR gate after inverting one input), and the final NAND gives $Y = \overline{Y_{1} \cdot Y_{2}}$ .

Applying De Morgan's law: $Y = \overset{ˉ}{Y_{1}} + \overset{ˉ}{Y_{2}} = \overline{A \cdot B} + \overline{\overset{ˉ}{A} + B} = (\overset{ˉ}{A} + \overset{ˉ}{B}) + (A \cdot \overset{ˉ}{B}) = \overset{ˉ}{A} + \overset{ˉ}{B}$ .

Building the truth table: $Y = 1$ whenever at least one input is 0, and $Y = 0$ only when both $A = 1$ and $B = 1$ . This matches option (1).

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JEE Main 2025 Apr 7 Shift 2, Physics Q11: Logic Gates

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